The question isn't whether ARM or x86 is the better architecture, but rather: Which architecture is better for your application? The answer depends on how you prioritize requirements, including power, speed, longevity, compatibility, and more.

ARM and x86 architectures both have sweet spots in the embedded industry. It’s no secret that ARM-based processors currently rule the smartphone/tablet market. As the low-power leader, ARM-based processors are generally a better choice for the smaller, fanless mechanical structure of mobile devices that require low heat output and long battery life. Intel rules the desktop and server market and is the go-to CPU choice for PC-based embedded applications and those requiring high levels of computing performance.

There’s more to this story, however. Power consumption at the device level is driven by multiple components, not just the CPU. Moreover, smartphones are purpose-built devices that are designed to be upgraded every two years, so less emphasis is placed on long product life cycles or compatibility with existing software environments. Smartphones are basically designed to do one thing, and do it very well.

In contrast, embedded PC form factors have enabled integrators to implement a wide variety of systems, tackling many different applications. Most successful PC platforms were designed for power envelopes that run from tens of watts to more than a hundred, which can put some portable and low-energy applications out of reach for an off-the-shelf solution.

The rise of the top CPU contenders

Both x86 and ARM have well-developed roles in the embedded marketplace – each ideally suited for a particular set of applications, and each essentially defined by the differences in how they communicate with I/Os. ARM’s three-step communication keeps processes streamlined but reduces power, while x86’s 10-step process is more detailed but also requires more time, power, and memory to complete.

In x86, this communication process relies on CISC, or complex instruction set computing. CISC is a mature technology, with core architecture choices that include instructions to work directly with I/O, as well as memory. ARM’s communication protocol – known as RISC, or reduced instruction set computing – does not include the instructions to work directly with I/O. RISC processes operate only on registers with a few instructions for loading and saving data to and from memory.

ARM’s simpler, native 32-bit architecture leads to a small area for silicon and significant power savings features. Optimized for the mobile phone and tablet markets, the ARM architecture provides an effective alternative that extends the power envelope into low-energy applications that have previously found it difficult to adopt standard form factors, and so had to absorb the high upfront costs of custom board and module design.

There are strong historical contrasts between the Intel x86 and ARM market environments. Intel has been instrumental in defining not just the core microprocessor and instruction-set architecture, but also the architecture of peripherals. Companies that provide embedded-computing products based on the x86 architecture have been able to leverage that (chip-level) expertise by providing either proprietary or open-standard products that use a common I/O interface. Through the use of common connector pinouts, it is possible for customers to select from a wide range of hardware- and software-compatible peripherals with which they can customize their end products.

The ARM environment is more complex and differentiated. In contrast to the PC environment – in which the core module is comprised of a processor, Northbridge, and Southbridge device – the focus in the ARM market is on system-on-chip (SoC) products, each usually optimized for a particular application. Historically, there has been far less focus on building standard I/O definitions; each SoC would be used on a custom board design. ARM also gives the user a wider range of I/O options, depending on their target market, with less emphasis on standard buses such as PCI Express.

The result has been the introduction of a number of proprietary form factors and connector definitions in the ARM arena that lock the customer into a vendor’s offerings and which may not have support for more than a generation of silicon as they move to different SoCs. Some vendors claim the use of a standard form factor – sometimes piggybacking ARM support on an existing x86-focused specification – but with additional custom connectors to provide support for I/O lines that cannot be supported by the primary connectors.

Considering form factor

COM Express is an example of a successful standards-based embedded computing I/O standard. It is a computer-on-module (COM) form factor that offers high integration to the degree that a complete, compact PC can be used in an end application as though it were a discrete integrated circuit component (Figure 1a). The COM Express module itself typically comprises the core processor and memory together with the standard I/O of a typical PC, including USB ports, audio, graphics, and Ethernet networking. The PCI Express lanes and all other I/O signals that provide support for custom I/O expansion are mapped to two high-density, low-profile connectors on the bottom side of the COM.

With COM Express, the emphasis is on high-speed I/O expansion. A pair of high-density connectors provide as many as 32 PCI Express lanes or multiple storage, networking, and graphics channels. In addition to providing a connector with a high degree of signal integrity and robustness, COM Express provides standardization, which is instrumental in building up a large portfolio of CPU modules and carrier boards from many different vendors. The road to a standard I/O pinout was assisted by the manner in which the PC form factor is itself built; that is, on a commonly accepted set of standard I/O functions.

An alternate COM form factor known as Smart Mobility ARChitecture (SMARC) started as an open-standard definition for ARM-based embedded computing solutions, optimized for low power, cost efficiency, and high performance. (Figure 1b). SMARC also provides support for systems that need more compact solutions than those offered by the PC-oriented form factors. As the ARM SoCs do not need the support chips of a PC platform and draw less power, the amount of board space that needs to be reserved for power converters and power supply lines is greatly reduced. This enables the use of a smaller form factor, facilitating use of SMARC-based modules in low-power portable equipment.

SMARC CPU modules are expected to have an actual power intake between two and six watts, enabling passive cooling and thus further reducing subsequent design effort and overall cost. The standard allows for as much as a nine-watt continuous power draw for more demanding scenarios, which also open the door for low-power x86-based CPUs like the latest Intel Atom family of SoCs.

If an application requires an x86 interface set, developers would find the ideal fit in a COM Express Mini sized module, providing low power and all the commonly required interfaces. When ARM interfaces are required – or perhaps a mix of both ARM and x86, for example in direct camera support or Integrated Interchip Sound (I²S) systems – then SMARC modules become the clear choice. Both COM Express and SMARC are good for mobile solutions because both have the option to design in battery-powered usage.

Figure 1: 1a and 1b: Examples of Intel Atom-based COM Express x86 board and Freescale i.MX6 SMARC ARM board.

The differentiators

ARM’s big.LITTLE architecture is a recent heterogeneous computing innovation that enables the placement of two different types of cores in a single CPU, so a dual-core or quad-core processor can offer two or four cores that differ in performance and power usage. This architecture is a key advancement in power savings for mobile devices, allowing a low-energy core to be used when a device is not busy and a high-performance core to be used when undertaking more complex tasks, such as gaming.

It must be noted, however, that ARM’s performance cannot compare to the computing power of the Intel Xeon processor family, serving industries such as telecommunications that depend on extremely reliable, well-tested, proven performance in their carrier-grade applications. In addition, the Intel AES New Instructions (Intel AES NI) encryption instruction set improves on the Advanced Encryption Standard (AES) algorithm and accelerates the encryption of data in the Intel Xeon processor family and the Intel Core processor family to enhance speed and security. On the flip side, the latest Intel Atom and Intel Celeron processor families bridge a performance-power-cost gap in the x86 arena and open a range of new embedded design strategies for sub-10-watt power requirements.

ARM and Intel in the Internet of Things

It’s clear that both ARM and Intel believe in the future of the Internet of Things (IoT) and are dedicated to developing standards and reference platforms to simplify IoT deployments. ARM has developed the ARM mbed IoT Device Platform to promote quick time to market for commercial and interoperable connected IoT devices based on ARM microcontrollers. For its part, Intel offers its Intel IoT Platform as an end-to-end reference model and family of Intel and partner products to provide a foundation for connecting devices and delivering data to the cloud for business analytics.

In addition, both companies have jumped into the pool of vendors working to define connectivity requirements for the billions of “things” soon to make up our connected world. ARM is active in The Thread Group, which focuses on smart-home applications, while Intel is involved in the Open Interconnect Consortium (OIC) and is a founding member of the Industrial Internet Consortium (IIC), which is focused on accelerating growth of the industrial Internet by identifying, assembling, and promoting best practices. Regardless of which CPU is the better choice for a given embedded application, this commitment by both organizations to making the IoT more accessible to industries and consumers alike is good news for the advancement of connected systems now and in the future.

Dirk Finstel is EVP for the Module Computer Product Segment at ADLINK Technology.He has 20-plus years of in-depth experience in embedded computer technology, with a proven track record in embedded modules. He has held executive-level positions at embedded computing companies since he founded Dr. Berghaus GmbH & Co. KG in 1991, and has been responsible for global technology, research and development, and setting technological strategy. Finstel holds a BS in Computer Engineering and Science.

ADLINK www.adlinktech.com