Military Embedded Systems

Properly evaluating ADCs for harsh conditions


June 27, 2022

Jonathan Harris


High-precision analog-to-digital converters (ADCs) are an integral part of many satellites and other systems used in space. It is important to understand how such devices respond in the harsh environment of space, where heavy ions may repeatedly strike. A detection algorithm can adequately identify single-event effects (SEE) – namely, single-event transients (SET) and single-event functional interrupts (SEFI) – in low-speed precision SAR [successive approximation register] ADCs without user-configurable registers. This information can be used to adequately determine the suitability of an ADC for space applications.

The use of a detection algorithm to evaluate how a high-precision analog-to-digital converter (ADC) will fare in space places the ADC into a set of real-world operating conditions to test the device in a manner in line with its actual usage. Applying this method requires that the ADC operates with an analog input in the middle of its input voltage range. This format enables detection of transient events in both the positive and negative directions. Operating the device in the middle of its input voltage range is in line with normal operation of the part in a real-world application, since most applications require maximum input signal range.

Observation of the ADC digital output codes can be performed by a logic analyzer or an FPGA [field-programmable gate array]. The examples provided here focus on the execution of this method using a logic analyzer. The method is designed to detect any event where the digital output code(s) is/are beyond a specified threshold. Depending upon the length of such an event, it can be determined if these events are SET or SEFI [single-event transients or single-event functional interrupts]. The threshold used for event detection is device-specific and is dependent upon a number of factors. Some of these factors include resolution and inherent ADC noise as well as environmental noise factors. A calibration run must be performed at the SEE testing facility prior to applying radiation to determine the expected code and the appropriate detection threshold range.

At a minimum, SEE testing should be performed using at least four heavy ions across a range of LET [linear energy transfer] values from 1 to 86 MeV•cm2/mg. Testing with at least four heavy ions provides enough data points to generate a suitable Weibull fit curve (to show probability). At the lowest LET value where no SEEs are observed, there is no need to test at any lower LET values.

The method here can have multiple implementations. The primary focus here is on utilizing a logic analyzer but the detection algorithm can also be implemented in an FPGA. The output data from the ADC is input to a logic analyzer in parallel format. Since most low-speed precision SAR ADCs use a SPI [serial peripheral interface] bus for data output, each data bit must be collected and put together to form the sample word. An on-board complex programmable logic device (CPLD) or similar logic device can provide the conversion start signal and serial data clock to the ADC as well as perform the serial-to-parallel conversion.

What is used to test?

Logic analyzers offer from one to four parallel port input buses, which is sufficient for most test cases. A 14-bit precision SAR ADC and the Keysight 16861A logic analyzer is used in this example. This logic analyzer offers two 16-bit parallel bus inputs each with a clock input. The logic analyzer is set up to detect code deviations (SET) outside a specified window on a per sample basis. This SET detection algorithm identifies single sample transients as well as consecutive sample transients. Figure 1 shows the full output code range for an ADC with an example plot of output codes in green and an example SET threshold in blue. Example transient events are highlighted in red. (Figure 1.)

[Figure 1 | Pictured: a single-event transient (SET) detection window.]

The logic analyzer software is set to automatically record the time when an SET event is detected. Additional separate software is required to perform post-processing of the data to determine the number and magnitude of single and multiple sample events based on the recorded data and times.

Prior to any SET run, each device should be observed with no radiation applied to find the appropriate SET window. The window should be set such that it is just above the inherent noise level of the ADC and any noise from the test environment. In the following examples, the window is set to ±8 codes centered at the average midscale code of 8200. Setting the ADC input to a mid-scale code enables transient excursions to be observed in both positive and negative directions. To set up the logic analyzer appropriately the advanced trigger feature of the Keysight 168161 logic analyzer is utilized and can be accessed as shown in Figure 2.

[Figure 2 | Pictured: the advanced trigger feature of a Keysight logic analyzer.]

Selecting the advanced trigger menu

It is important to note that each step number in the advanced trigger operation corresponds to one input clock cycle. This limits processing of the sample to simple detection in the logic analyzer, but external software is used to process the data as mentioned previously. The advanced trigger menu is set up in the detection window. When a sample is within this specified range, the logic analyzer does not store the sample. A counter function is used that can be programmed to the desired maximum number of SET. (Figure 3.)

[Figure 3 | Pictured: the advanced trigger menu setup on the Keysight 16861A logic analyzer.]

At any point during the operation of the test, the execution of the algorithm in the logic analyzer can be stopped and at this point the stored samples are saved to a file; that is, if the maximum fluence has been reached but the maximum count has not been reached. This step is accomplished by clicking “stop” under the run/stop menu. (Figure 4.)

[Figure 4 | Pictured: the run/stop menu selection.]

The logic analyzer must be configured to capture the appropriate data and save it into a known location. This is selected under the run/stop menu as shown in Figure 5. From the run/stop menu the run properties selection is chosen to specify what is captured when the advanced trigger detects a sample outside the specified threshold. In this window the logic analyzer is specified to save after every acquisition, to increment the file name between runs, and to stop running after 10 acquisitions (this stop is mostly just a precaution since only one acquisition is necessary). In addition, the file location and file type for the data is specified. The data recorded includes all the data in the waveform including samples that violate the threshold along with the time stamps of each data point. Saving the time stamp along with the data provides the length of each SET. This step enables identification of single- and multiple-sample events by using software to calculate the time delta between time stamps to find the number of sample periods between recorded SET events. (Figure 5.)

[Figure 5 | Pictured: the run properties menu selection.]

A SEFI event can be identified if the counter reaches its maximum. In the event this occurs, then a secondary read of the ADC output code is performed using a standard data capture in the logic analyzer. If the ADC output code remains at a value outside of the expected window, then a SEFI may have occurred. Once this condition is identified a reset of the device if available should be performed. Upon resetting, another standard data capture is performed to see if the condition has remedied. If not, a power cycle should be performed followed by another standard data capture. If the ADC output code still does not return to the expected range, then the ADC may have permanent damage.

What this testing accomplishes

This test method provides detection of SET and SEFI for precision SAR ADCs, which means that single-sample transient events, multiple-sample transient events, and SEFI can be identified. This test method exercises and observes the full range of the ADC to mimic the experience of a real application. The results of testing with this method enable the SEE performance of the ADC to be projected in an application by plotting the Weibull fit curves for the saturation cross section and using the CRÈME96 model for the appropriate orbit.

Jonathan Harris is an applications engineer in the space and hi-rel products group at Renesas in Palm Bay, Florida. He has over 15 years of applications experience with more than 10 of those years supporting ADC products. He enjoys a good game of table tennis, tinkering with car audio, and riding motorcycles. He can be reached at [email protected].


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