Military Embedded Systems

DSP library portability speeds application development


June 17, 2009

Duncan Young

GE Intelligent Platforms, Inc.

Though DSP libraries abound for AltiVec-based applications, new architectures require new potential hosts for DSP applications. Thus, new libraries providing advanced portability are integral to the equation.

Many of today’s military DSP applications such as radar, sonar, imaging, and signals intelligence make use of high-performance, multicomputing DSP configurations. Often combined with FPGA front-end processing, these applications will typically benefit from 128-bit vector processing engines such as Freescale Semiconductor’s AltiVec found in their e600 core-based processing products. DSP libraries are well established for the AltiVec, but as new architectures are explored as potential hosts for newer DSP applications, there is a need for more portability of tools and libraries to enable better evaluation and implementation of these alternatives.

Libraries are an essential tool often delivered as part of a comprehensive DSP development environment. In addition to libraries, such a multicomputing development environment will typically include graphical tools, middleware, and debugging tools. The graphical tool is used for the visualization of software, hardware, and interconnect configurations, enabling performance modeling and the allocation of tasks and processes to processing nodes. Middleware abstracts intimate hardware details provided by the developer, offering a common set of function calls for booting, DMA engines, memory control, and interprocessor communication. Debugging tools can be used during design and development for instrumentation, analysis, and performance evaluation of processing nodes or complete DSP systems.

Understanding open-standard libraries

Vendor-supplied libraries are traditionally targeted to the specific hardware and real-time operating system configurations offered by that vendor. These libraries may be based on an open standard such as the Vector Signal Image Processing Library (VSIPL), or where a vendor is offering unique expertise, libraries might be highly optimized to suit a preferred application area or skill set, such as imaging or software radio. VSIPL provides many generic DSP library functions: matrix operations, FFT, convolution, Finite Impulse Response (FIR) filtering, and correlation for a broad range of commercial and military applications typically including radar and signals intelligence. VSIPL is a library definition that requires vendors to write a port for their particular hardware products. It must also be instrumented and integrated into a development environment to simulate algorithmic performance and to aid in system debugging and verification. Graphical representation and simulation are used to assist in early design tasks including partitioning and assigning functions to processing nodes.

Portability is key

COTS vendors and systems integrators are recognizing that many more processing architectures are candidates for military DSP applications. For example, a number of sonar systems deployed in submarines are being implemented on ruggedized, networked servers or on embedded, off-the-shelf computers based on Intel architecture with Linux or Windows. Having invested in the software development of such DSP systems, integrators are also looking for maximum reuse through portability and scalability for different platform types. COTS vendors are responding by taking the long view, offering generic, processor-agnostic C libraries integrated with their development environments. These libraries support early system architecture design and evaluation independently of the need to choose a particular processor type.

To make meaningful comparative analyses, these C libraries must be ported to specific hardware implementations and operating systems. Additionally, the development environment must graphically represent these new implementations and support simulated performance and assignment of processes between multiple, possibly disparate, nodes. These capabilities are provided by GE Fanuc Intelligent Platforms’ AXIS DSP development environment, which offers highly optimized runtime libraries for AltiVec-based architectures and generic library support for Intel architectures (Figure 1). It is offered in desktop, laptop, or embedded form and supports non-AltiVec PowerPC devices and cores.

Figure 1: A screen capture shows the AXIS development environment, graphically depicting two Intel Xeon-based processing nodes.

Enabling the evaluation and migration of more portable DSP applications to next-gen processing devices is becoming a key part of COTS vendors’ strategies. Providing generic libraries allows alternative hardware platforms to be compared, leaving the final choice until much later in the design process. Further performance optimizations, such as Intel’s SSE4 extensions, can be incorporated later at runtime. Being able to start the design process earlier in the cycle will speed overall project development by delaying the all-important hardware platform choice until the system has been fully architected and partitioned.

To learn more, e-mail Duncan Young at [email protected]


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