GUEST BLOG: Boundary conditions for conduction-cooled module simulationsBlog
September 16, 2022
The VITA 47 standard describes the boundary of the module as a maximum, with different values depending on the class.
This is a convenient requirement as it is easy to apply a temperature boundary condition to interface surfaces in an FEA [finite element analysis] model and determine the thermal performance of the card. This is also useful if the heat is evenly spread across the card and the chassis is close to isothermal. The problem is that under certain conditions, this approach will overestimate the thermal performance of the module.
When building a thermal model of a VPX chassis and modules it is common to start by breaking the model into pieces to reduce the complexity of each model. The rails of the modules are a common place to split that model, and even encouraged by the VITA 47 standard. The standard describes the boundary of the module as a maximum, with different values depending on the class. This is a convenient requirement as it is easy to apply a temperature boundary condition to interface surfaces in an FEA model and determine the thermal performance of the card. This can be a good boundary condition if the heat is evenly spread across the card and the chassis is close to isothermal. The problem is that under certain conditions, this approach will overestimate the thermal performance of the module. The following three conditions should cause reconsideration of a simple temperature boundary condition.
• High heat fluxes or uneven fluxes along the length of the card
When the heat flux is high, or the heat is all biased to the front or back of the card, a large temperature gradient can be generated between the front and back of the card. When a constant temperature boundary condition on the interface surfaces is applied, it will force an uneven flux across the wedgelock. When the resistance of the wedgelock is applied in the system model, it assumes constant flux along its length, which can lead to a significant de-crease in performance. Using a heat-transfer coefficient in the module to chassis interface area can significantly im-prove the model of these types of modules. If the chassis rails are relatively isothermal, simply use that as the reference temperature, and calculate a coefficient based on the wedgelock performance.
• Large temperature gradients along the chassis rails
Similar to the issues described above, a chassis with significant temperature gradients along the rails will cause the heat flux into the chassis to be uneven resulting in an inaccurate prediction of the card and chassis performance. In a chassis this can be caused by multiple things including liquid flow distribution issues, temperature rise of the liquid as it picks up heat from the chassis, and conduction gradients if the heat is being conducted to a remote cold wall. In these cases, start with a FEA model of just the module, but what’s recommended is quickly building a system model that includes both the chassis and modules.
• Additional thermal interfaces to chassis
As engineers design around higher and higher heat outputs, they are often forced to operate outside of the VPX standards to improve the thermal performance of their systems. One way this can be accomplished is by adding heat-transfer paths to supplement the cooling on the rails. This is typically done by adding a surface at the back of the module that get cooled by the chassis via an interface material. Adding in these surfaces can significantly improve the performance of the system but can quickly complicate the thermal model. These systems have multiple paths for heat to flow to the eventual sink, so it is critical to accurately capture the distribution of heat.
One way to approach this problem is to build a resistance model of the module and chassis, then apply the temperatures at the nodes of the network to a component model. The challenge with this model is that it typically requires iteration between the system resistance network model and module model. It is critical to verify that the two models are in agreement in terms of temperatures and heat flow through each of the interfaces to ensure an accurate representation of the system. Similarly, to the methods de-scribed in the earlier sections, using heat-transfer coefficients for module-level simulations can help reduce the number of iterations, while more accurately capturing the heat flow through the interfaces.
To get the most out of thermal assemblies, it is critical to isothermalize the individual components as much as possible to improve their performance and the performance of the next component in the network. Passive heat-transfer enhancements in the form of heat pipes, pulsating heat pipes, or annealed pyrolytic graphite are easy ways to make these improvements without adding complexity to the system. We recommend heat pipes for most applications for their affordability, ability to outperform most other technologies, and their proven track record in extreme environments. They enable a wide range of integration options including embedding into plates as thin as .100”. Such enhancements can be made to both the module frame and chassis and can alleviate many of the modeling issues described above. Another simple way to improve these systems is by using ACT’s ICELOKs as the wedgelock, which can enable as much as a 30% reduction of wedgelock resistances compared to COTS [commercial off-the-shelf] wedgelocks and can be integrated into most VPX modules without substantial modifications.
Advanced Cooling Technologies (ACT) · https://www.1-act.com/