Military Embedded Systems

DARPA looks to integrate PCBs onto chip-sized devices


July 28, 2016

John McHale

Editorial Director

Military Embedded Systems

DARPA looks to integrate PCBs onto chip-sized devices

ARLINGTON, Virginia. Officials at the Defense Advanced Research Projects Agency (DARPA) want to take another step forward in electronics miniaturization by essentially integrating the collective functions hosted by an entire PCB onto a device that is about the size of a single chip.

They are looking to have industry solve this problem under the Common Heterogeneous Integration and Intellectual Property (IP) Reuse Strategies Program, also known as CHIPS.

“It’s not just a fun acronym,” says Dr. Daniel Green, manager of the new program. “The program is all about devising a physical library of component chips, or chiplets, that we can assemble in a modular fashion. We are trying to push the massive amount of integration you typically get on a printed circuit board down into an even more compact format.”

A primary driver of CHIPS is to develop an industry-friendly architectural strategy for designing and building new generations of microsystems in which the time and energy it takes to move signals—that is, data—between chips is reduced by factors of tens or even hundreds, according to DARPA.

“This is increasingly important for the data-intensive processing that we have to do as the data sets we are dealing with get bigger and bigger,” Green says. "Although the program does not specify applications, the new architectural strategy at the program’s heart could open new routes to computational efficiencies required for such feats as identifying objects and actions in real-time video feeds, real-time language translation, and coordinating motion on-the-fly among swarms of fast-moving unmanned aerial vehicles (UAVs).


DARPA officials posted a Request for Information (RFI), designated on as DARPA-SN-16-50, to search for ideas at the front-end of the program from industry players so that the CHIPS team can hone the details of the program in ways that would ease graceful integration of these new approaches within existing commercial semiconductor foundries and electronics fabrication facilities.

“Key to the success of CHIPS will be standards and interfaces, and this means we will be working with a community, not all by ourselves,” Green explains. According to DARPA the CHIPS team expects to use input from the RFI and a workshop anticipated to occur later this summer to prepare a Broad Agency Announcement (BAA). The BAA, which will also be posted on, will specify the program’s technical goals and how potential performers can submit proposals.

A major aspect of the CHIPS vision is the eventual availability of a library of custom and commercial “chiplets”—small-scale chips that individually embody a particular function, such as data storage, computation, signal processing, and managing the form and flow of data, according to a DARPA release. By assembling and integrating dozens of chiplets, mosaic style, on a so-called interposer, like a printed circuit board writ small, all of those microsystems’ functions could then be performed in a much closer huddle and more efficiently than if they were distributed in the usual way among a suite of chips attached to a conventional PCB.

Green says he also hopes to be able to separate out onto individual chiplets the many IP blocks developed for and aggregated into commercial monolithic chips. Such partitioning of computational functions could open the way for the DoD to negotiate more affordable licensing of smaller and more specific IP blocks suitable for repurposing for particular technologies and systems. “If CHIPS is successful, we will gain access to a wider variety of specialized IP blocks that we will be able to integrate into our systems more easily and with lower costs,” he says. “This should be a win for both the commercial and defense sectors.”


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