MIL-STD protocol ICs feature user-allocated SRAM
ProductJanuary 21, 2015
The 3.3V CMOS HI-613x device from Holt Integrated Circuits offers a single- or multi-function interface between a host processor and MIL-STD-1553B bus. Each IC contains a bus controller, a bus monitor terminal, and two independent remote terminals; any combination of the contained 1553 fun...
The 3.3V CMOS HI-613x device from Holt Integrated Circuits offers a single- or multi-function interface between a host processor and MIL-STD-1553B bus. Each IC contains a bus controller, a bus monitor terminal, and two independent remote terminals; any combination of the contained 1553 functions can be enabled for concurrent operation. The enabled terminals communicate with the MIL-STD-1553 buses through a shared on-chip dual bus transceiver and external transformer. Users can allocate 64K bytes of on-chip static RAM between devices to suit application requirements, which can range from MIL-STD-1553 terminals and avionics instrumentation to flight control/monitoring and electronic counter-countermeasures.
Two versions of the HI-613x are available for host access to internal registers and static RAM: The HI-6130 uses a 16-bit parallel bus, while the HI-6131 communicates with the host via a four-wire serial peripheral interface (SPI). The chips can also handle extended temperature ranges: -40 °C to +85 °C or -55 °C to +125 °C, with optional burn-in. Programmable interrupts provide terminal status to the host processor. Circular data stacks in RAM have rollover and programmable level-attained interrupts. The HI-613x also can be configured for automatic self-initialization after reset. A dedicated SPI port reads data from an external serial EEPROM to fully configure registers and RAM for any subset of one to four terminal devices.
