Flash FPGAs: Often imitated, never duplicatedStory
May 09, 2008
Not all nonvolatile or flash FPGA devices are created equal. Explored here, the benefits of true nonvolatile FPGAs - including significantly reduced power consumption, faster response times, unparalleled reliability, and uncompromising security - cannot be duplicated.
Nonvolatile flash memory brings many benefits to FPGAs. True nonvolatile flash-based FPGAs, or those that contain a nonvolatile FPGA array, enable significantly reduced power consumption, offer faster response times, and deliver unparalleled reliability and uncompromising security.
Validating the merits of these advantages over their own volatile devices, several suppliers of SRAM-based FPGAs claim to offer "single-chip, flash-based" solutions. These "hybrid" solutions are merely combinations of flash memory components with the underlying SRAM FPGA technology - either integrated with the FPGA die into a single package or, alternatively, stacked or placed side by side. Unfortunately, the FPGA array is still volatile and is subject to the power, reliability, security, and slow power-up drawbacks associated with these types of devices.
Certainly, both the Silicon-In-Package (SIP) and the MultiChip Package (MCP) "hybrid" approaches overcome some of the limitations of traditional SRAM-based solutions by providing a smaller footprint, a minor reduction in power consumption, and small advances in power-up time and security. But these are only incremental improvements over their pure SRAM-based brothers. In order to realize the full benefits of a true flash-based solution, i's important to understand the primary differences between these "hybrid" approaches and true flash-based FPGAs, as well as the benefits that true flash-based solutions offer.
Perhaps the single biggest benefit of a true nonvolatile flash-based FPGA array is the significantly reduced power consumption. As mentioned earlier, hybrid solutions simply combine flash memory and SRAM-based FPGA die together, meaning that the inherent architecture is still SRAM-based. As a result, they are subject to the well-documented leakage current issues and power spikes during system initialization associated with SRAM-based FPGA solutions.
Figure 1 illustrates the power advantages of a true flash-based solution, the lowest power programmable device on the market today, over SRAM-based solutions. The comparison is based on equivalent 15k system gates or 128 macrocells. Competitor A is an SRAM-based hybrid CPLD and Competitor B is an SRAM-based "low-power" CPLD. The 5 microwatt true flash-based FPGA exhibits 10x lower static power than the alternatives.
(Click graphic to zoom by 1.3x)
True "live at power-up"
True flash-based FPGAs retain configuration memory while their flash-based SRAM counterparts must rely on flash memory for configuration when the power is turned off. As a result, they not only consume more power, but also cannot achieve "instant on" Live-At-Power-Up (LAPU) status. "Instant on" means that devices are operational as soon as the system voltage has reached its minimum level. Hybrid solutions can be configured more quickly than traditional SRAM-based FPGAs (Figure 2), though they are still up to 40x slower than their true flash-based "instant on" FPGA counterparts (Figure 3). This behavioral profile shows that hybrid device configuration takes more than 200 milliseconds, causing a delay in operation after power-up. Meanwhile, true flash-based FPGAs are live-at-power-up. Thus, true nonvolatile FPGAs are active immediately after the voltage trigger and operational before power-up.
Hybrid FPGAs also present reliability concerns. Because the underlying architecture is still SRAM-based, these solutions are subject to radiation effects. High-energy neutrons are present in the atmosphere at ground level and can impact the logic modules and routing matrixes of SRAM-based FPGAs, causing firm errors and complete system failures. True nonvolatile FPGAs deliver critical firm error immunity for system-critical and mission-critical functions.
Preventing malicious attacks and hacking
While the security threat has been lessened by moving the flash memory into the same package, the transfer of configuration data from flash memory to the SRAM portion of the hybrid device still makes that data stream vulnerable to hacking and malicious attacks. Comparatively, true flash-based FPGAs don't require reconfiguration at power-up, eliminating a serious risk. With additional security, such as a 128-bit Advanced Encryption Standard (AES) decryption core, true flash FPGAs give IP providers peace of mind and help designers guard against security issues like cloning, reverse engineering, and denial-of-service attacks.
Imitation doesn't equal duplication
Clearly, not all "nonvolatile" or "flash" FPGA devices are created equal. Some devices labeled as "flash" simply integrate flash together with an SRAM-based FPGA to minimize the footprint. True flash-based FPGAs are those that contain a nonvolatile FPGA array, enabling significantly reduced power consumption, improving faster response times, and delivering unparalleled reliability and uncompromising security. The advantages of a true flash FPGA solution can be imitated, but cannot be duplicated.
Hezi Saar is a senior product marketing manager responsible for Acte's ultra-low power IGLOO as well as its third-generation ProASIC3/E/L flash FPGAs. He has more than 12 years of experience in the semiconductor and electronics industries in embedded systems and marketing positions. Hezi holds a B.Sc. from Tel Aviv University in Computer Science and Economics, and an MBA from CSU. For more information, e-mail [email protected].