Military Embedded Systems

Exploiting MOSA software for high-performance ISR and signal processing applications


February 11, 2013

Michael Stern

Abaco Systems

High Performance Embedded Computing (HPEC) is rapidly becoming mainstream in the mil/aero embedded computing world, bringing with it the potential to solve increasingly challenging problems such as that of processing ISR and other signal processing data. The key for developers, however, is to make the right architectural and technology choices as mandated by the DoD's Modular Open Systems Architecture (MOSA) initiative - and then to exploit those architectures and technologies, rather than be constrained by them. To help accomplish this, software tools utilizing advanced modeling and optimization techniques are available to enable designers to analyze their MOSA-based implementations for maximum efficacy.

Today, we live in a connected world in which the on-demand information we take for granted is made available through densely populated data processing centers. These centers process what is sometimes referred to as Big Data, and they rely on High Performance Computing (HPC) technology built out on a large scale measured in acres of rack-mounted servers and megawatts of power consumption.

The mil/aero world is seeing a similar revolution in terms of connectivity – except that what is being connected isn’t cellphones, tablets, and netbooks. It’s sensors – video, infrared, radar, sonar, and so on. And those sensors are becoming capable of capturing data at higher and higher resolutions. It is also becoming common to see dedicated processors give way to systems that process and fuse data from multiple modalities. For instance, a UAV may carry EO, IR, and SAR sensor suites, but might not have the Size, Weight, and Power (SWaP) budget for a dedicated processor for each as can be the case on larger airframes. It is becoming common practice to feed all these data streams across a standard interface (such as Ethernet) into one processing system that employs multiple multicore devices to provide the compute power required to form the individual products and to then merge and exploit them.

That need to process more data from more sources at higher resolutions at faster speeds gave rise to the High Performance Embedded Computing (HPEC) phenomenon. It is the direct descendant of HPC, but instead of occupying acres of air-conditioned data centers consuming megawatts of power, it’s being deployed in 6U – and even 3U – chassis in environments that are invariably SWaP constrained.

The key for developers of radar, signal processing, ISR systems, and other mil/aero technologies is to identify the optimum architecture and technology choices. The right choices – industry standards such as OpenVPX and commercial technologies such as InfiniBand and 10 GbE switch fabrics – lead to reduced development time, reduced risk, reduced cost, and reduced time to revenue. The wrong choices lead to avoidable risk, cost, and effort – and, no less significantly, dead ends that can substantially impair the long-term viability and supportability of a program. Being based on industry standards, these technologies are also compliant with the demands of the Modular Open Systems Architecture (MOSA). And, enabled by modern software tools featuring advanced modeling and optimization capabilities to ensure maximum MOSA efficacy, the sky’s the limit when it comes to performance.

Technologies: Look to the commercial world

MOSA is the DoD’s approach to these choices. It is not prescriptive in terms of architectures and technologies; rather, it requires developers to leverage widely supported, consensus-based standards, whatever those might be and wherever they might be found. The MOSA approach looks to enhanced combat capability for the warfighter through enhanced interoperability, reduced life-cycle costs, and a shortened cycle time.

The Commercial Off-the-Shelf (COTS) philosophy has now long been ingrained in the minds of mil/aero systems developers, such as those designing signal processing and ISR systems, and can be considered a precursor to MOSA with its emphasis on access to the latest commercial technologies that are supported by not just a broad array of competitively priced software and hardware products, but also by an ecosystem of skills and expertise. HPEC applications such as signal and image processing can derive similar benefits. The HPC world provides a model, and developers wanting to create sophisticated HPEC applications should turn toward the commercial world.

Today’s Big Data centers and communications networks run server-grade Linux operating systems and open standard middleware upon which enterprise-level applications are built. These software layers are optimized to provide very high system availability as well as the highest levels of interprocess communication performance across multiple compute nodes, compute clusters, and data center networks.

Typical hardware platforms comprise thousands of x86 multicore CPUs and can also harness thousands of many-core, parallel processor nodes such as Graphics Processor Units (GPUs) to accelerate compute-intensive tasks such as radar and other sensor data processing. These CPU/GPU clusters are interconnected over high-speed serial networks based on protocols such as PCI Express, Ethernet, and InfiniBand from companies such as Intel, NVIDIA, AMD, Mellanox, and other silicon vendors.

Mil/aero embedded computing developers can also benefit by sourcing these same open architecture platforms in form factors such as OpenVPX that are designed for rugged, extended temperature, shock, and vibration environments typical of deployed defense and aerospace platforms. Such open architecture platforms enable the same applications developed on commercial server clusters to be deployed on rugged tactical systems in the theater of operations. The benefits? Faster development, lower cost, reduced risk, earlier deployment. In addition, by being based on open architectures at the silicon, board, system and middleware layers, such platforms are inherently aligned with the guiding principles of MOSA.

ISR: Sensor-to-user platforms are on the rise

Deployed Intelligence, Surveillance, and Reconnaissance (ISR) platforms comprise sensors that acquire and process real-world signals at very high resolutions. Such sensors include antennae for radar and signals intelligence as well as a variety of cameras and other interfaces. The analog signals captured at the front end of the platform are digitized and then processed in various stages to extract meaningful information for users within various timeframes depending on the needs of the user communities. For example, the platform itself might require output from the data processing pipeline to help control the vehicle and execute the mission, especially when the platform is unmanned. Event-driven control loops in HPC systems can usually meet the needs of their user communities within varying response times measured in hundreds of milliseconds or even seconds rather than microseconds.

ARGUS-IS, for instance, has 368 five-megapixel cameras that combine for an equivalent of 1.8 gigapixels total, and can supply 65 separate VGA resolution video streams to warfighters. A 15 Hz frame rate yields an aggregated data rate of some 27 gigapixels per second. Given that the ground link is a common data link with a bit rate of 274 Mbps, it is easy to deduce that a huge data reduction must take place on the platform, and that will require at least 10 TeraOPS of processing power.

Another typical ISR processing platform fuses data from a synthetic aperture radar with a step-stare optical camera and other sensors in a package designed for deployment on a SWaP-constrained UAV platform, with a processing load that demands close to a TFLOP of compute power in a compact footprint. The original incarnation of the system used nonrugged commercial servers based on Intel processors and Ethernet interconnects, with software layered over standard math libraries, MPI, and Linux. The migration from this to a fully rugged system was simple because of support of the same MOSA-compliant software elements.

A perfect example of the architecture/technology that underpins MOSA is Linux. Linux-based platforms used in Big Data centers support stringent quality of service and availability imperatives by harnessing open standards developed across a very wide user community and support infrastructure – and can certainly provide the raw compute power required to process large streams of digitized data from high-resolution, real-world sensors. However, such sensor processing subsystems are not typically relied on to deliver time-critical flight control commands aimed at ensuring the flightworthiness of an Unmanned Aerial Vehicle (UAV), for example. It is therefore critical that system architects carefully consider how best to deploy such Linux-based open platform capabilities as subsystem components within deployed ISR platforms.

Fortunately, system integrators can now characterize the performance of ISR processing subsystems using a variety of application development environments. Figures 1 and 2 on page 32 show a task-level event analyzer to assist the application developer in identifying timing anomalies that can affect application-level response times and system variability or jitter. GE’s AXIS Advanced Multiprocessor Integrated Software environment lets application developers quickly create worst-case test harnesses running on the deployable HPEC platform before finalizing the system architecture.


Figure 1: AXISView – EventView task-level event analysis tool running on an HPEC platform. Screen shot taken before application tuning.

(Click graphic to zoom by 1.9x)





Figure 2: AXISView – EventView task-level event analysis tool running on an HPEC platform. Screen shot taken after application tuning.

(Click graphic to zoom by 1.9x)




Using this environment on a multinode/multiboard system running Linux and open standards-compliant middleware such as the OpenFabrics Enterprise Distribution (OFED) Remote Direct Memory Access (RDMA) driver over 10 GbE, it is possible to demonstrate near wire speed interprocess communication with zero CPU load and typical application-level, memory-to-memory latencies of less than 5 microseconds with worst-case jitter not exceeding 12 microseconds. This performance was achieved running standard Red Hat Enterprise Linux (RHEL) over a multiboard system with 10 GbE data plane. Further performance improvements are possible by moving to RHEL-compatible, real-time versions of Linux.

Such task-level performance analysis enables rapid prototyping of multiprocessor ISR and signal processing systems. Developers can produce evidence such as histograms to demonstrate response times, interprocess communication performance, and jitter over extended operational timeframes to validate system architecture decisions and algorithm design early in the platform development cycle to de-risk the delivery of SWaP-critical tactical systems to their end user customers. These parameters are of particular interest to engineers developing radar and Electronic Intelligence (ELINT) systems. ELINT is particularly sensitive to end-to-end latency of a system, as a characterization of and response to a threat must happen within a tightly defined time window to be effective. Being able to characterize latency and the variation in it is key to validating a system.

The promise of open architecture platforms

Defense and aerospace system integrators can meet the needs of deployed ISR and other signal processing systems by adopting open architecture platforms such as those envisioned by the MOSA initiative. Such a strategy holds out the promise of expanded mission capabilities now and increased performance in the future with the insertion of next-generation hardware from Big Data commerce.

Importantly, where questions exist about the viability of those open standards for mission-critical applications, the availability of sophisticated software tools allows their implementation to be thoroughly evaluated using advanced modeling and optimization techniques. System architects and application developers can accurately characterize system performance while benefiting from wide community support for open operating systems, middleware, and tools in support of multiyear programs. This approach can also enable technology reuse across multiple platforms when applications developed on commercial HPC clusters are rehosted on a range of deployable platforms.

MOSA software is not a destination – it is a journey.

Michael Stern is a Senior Product Manager at GE Intelligent Platforms, where he is responsible for the company’s High-Performance Embedded Computing (HPEC) product line. He has spent 20 years within the defense and aerospace market. He can be reached at [email protected].

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