PCIe dual digitizer for DSP

Eletter Product

The DRX16 is a mezzanine board that pairs with a PCIe main board to simultaneously digitize two IF signals, at the same rate or different rates, via two ports with 16-bit ADCs.

Custom FPGA-based DSP designs are available. Alternatively, for basic signal capture and spectral display, standard EDT firmware and software are included.

The board has a configurable Xilinx Virtex 6 LX FPGA (XC6VLX240T) and two identical ports for 2 to 300 MHz. The ports can be filled with two no-gain input direct modules (IDX, option A), or two fixed-gain input direct modules (IDX-FG, option B) with the same or different gain settings.

Each port has its own 16-bit ADC. Output is digitized by the ADCs and captured in the FPGA, which performs DSP or routes data to the main board.

Each port has a sample clock that can be tuned independently from 10 to 130 MHz. A third clock is available via the sample clock I/O connector, which can be set as input or output.

The timebase can be the provided 10 MHz TCXO, or a user-provided source linked to the reference input. A reference output and a time code input (1 pps or IRIG-B) also are included.

The main board supplies DMA, plus additional memory and programmable FPGA resources.

Features

Mezzanine board – pairs with an EDT main board (PCIe), which adds DMA, programmable FPGA resources, and memory
Digitizes two IF signals (tuned independently) via two ports with 16-bit ADCs
FPGA: One programmable Xilinx Virtex 6 (XC6VLX240T)
Ports: Two identical – each with one input direct module (IDX) for 2 to 300 MHz, with two gain options...
- Option A, two IDX modules: no gain
- Option B, two IDX-FG modules: fixed gain (it can be different on each module)
ADCs: Two 16-bit (one per port)
Sample clocks: Independently programmable for each port (10 to 130 MHz)
Sample clock I/O: Programmable as input or output
Timebase: 10 MHz TCXO or reference input, available via reference output
Time code: 1 pps or IRIG-B input