Military Embedded Systems

Standard network interfaces, heterogeneous architecture, and COTS solutions: Recent trends in signal processing


January 15, 2020

David Jedynak


Standard network interfaces, heterogeneous architecture, and COTS solutions: Recent trends in signal processing

As the amount of signal-processing data used in defense
applications continues to grow, the challenge for system architects becomes
less about hardware design and more about what to do with all that data, and
how. Because commercial off-the-shelf (COTS) solutions can now be used to move
the data, the system designer can better focus on what they are going to do
with that data and concentrate on solving their higher-level problems.

One of the most impactful trends in ISR/EW [intelligence,
surveillance, and reconnaissance/electronic warfare] signal processing
technology that’s emerged in recent years has been the move toward low-latency
open standard network interfaces and their replacement of legacy analog
interfaces and some proprietary interfaces. This trend has great significance
because the more that signal processing takes advantage of network-based
packetized Ethernet-style interfaces, the more modern the overall system
architecture can become.

For signal processing applications, the goal is to move
incoming analog data from the sensor element(s) to the processing elements as
quickly as possible so that the data can be worked on as closely to real time
with lowest latency possible. By rapidly getting that incoming sensor data on
to an open standards-based network, to the user can powerfully leverage today’s
modern high-speed networking standards, whether optical or copper, to move or
record it. On the processing side, the use of standard network interfaces
liberates the system designer from spending time considering which parts of the
system require what different types of interfaces. Until recently, signal
processing application designers had to deal with a plethora of interface
types. Today, it’s now possible and practical to reduce the number of different
interface “flavors” down to a mere handful. That makes it much easier to
leverage sophisticated, proven technologies from adjacent markets that also use
those standard network interfaces, such as the high-speed data fabrics used in
data and financial trading centers.

Different types of silicon bring various strengths

Another major trend in ISR/EW signal processing is the
growth of heterogeneous processing. Designers now better understand how
different types of silicon – for example, a CPU, FPGA, or GPU – each bring
different strengths to signal processing applications. Each type of device
brings its own unique strengths and weaknesses. Heterogeneous devices can be
clustered together and communicate via modern standard interconnects, such as
network interfaces or PCI Express (PCIe) based interfaces, for example, making
it easier to mix, match, and balance the signal processing system architecture;
or to make the system more extensible, based on the application’s own unique design
requirements. In the past, without the use of open standard network interfaces,
the signal processing system designer was often forced into a corner, saddled
with a system architecture that compromised performance and flexibility because
of the need to deal with a variety of arcane interfaces.

Today, thanks to the combination of heterogeneous system
architectures and low-latency open standard network interfaces, signal
processing system integrators are also better able to develop commercial
off-the-shelf (COTS) solutions that enable unique ways of computing.
Previously, signal processing customers, not unreasonably, assumed that complex
processing requirements would demand a fully custom design approach, often a
costly one-off, built only to address a specific task and interfaces at hand.
Today, complex signal processing systems can be quickly and cost-effectively
addressed with off-the-shelf VITA standard-based hardware. Combining standard
network interfaces and heterogeneous compute architectures makes it easier for
the system designer to select the right sort of processing technology (while still
standards-based), optimized for their particular application and all
communicating in an open standard way, to apply new exotic types of algorithms
– such as machine learning – to the incoming signals.

Even better, this approach means that all of the processing
elements can reside either in a single chassis, or they can be distributed
throughout the platform, which can be hugely beneficial in size, weight, and
power (SWaP)-constrained platform environments. Once the data is available on
the network, the widest variety of processing technology can be more
effectively leveraged in an extensible, modular way. Instead of being a signal-transmission
path problem, the signal processing chain becomes a more typical data center-style
information technology challenge, which is much easier to manage. For example,
incoming networked data can readily be sent first to two different boxes, and
then after that sent from one box to another.

By making it easier and more effective to leverage different
types of processing technologies, it also becomes less difficult to use
different types of algorithms and computing at a higher level to extract useful
and actionable information. A result of the use of high-speed modern network
interfaces and heterogeneous architectures is that the ultimate architecture
and design of application-specific processing becomes significantly easier,
more cost-effective, and more quickly deployable.

Put the signal data on the network

Placing all of the signal data over the network makes it
practical, efficient, and cost-effective to deploy heterogeneous processing.
This setup enables the system itself to be decomposed and recomposed in certain
ways so that capabilities can be added or changed later without having to rearchitect
the entire physical system. For example, if it is necessary to move a huge
amount of data to a different part of the network, a machine learning program
can be applied at the front end that removes all extraneous signal data and breaks
an otherwise fat pipe of data down into a significantly smaller data stream
before it is sent on to the next processing stage. This scenario represents a
real breakthrough that promises to drive a whole new realm of possibilities for
COTS-based signal processing.

An example of applying machine learning to signal processing:
The collaboration between Curtiss-Wright Defense Solutions and General Dynamics
Mission Systems to deliver deployable open architecture-based artificial
intelligence (AI) COTS solutions for signal intelligence (SIGINT) and EW
situational-awareness applications. The two companies have combined an Intel
Xeon D processor-based CHAMP-XD1 module and SignalEye threat-detection software
to deliver RF spectrum situational awareness that automatically classifies
signals through the use of machine learning. (Figure 1.)

Figure 1 | The SignalEye/CHAMP-XD1 solution is aimed at SIGINT and EW situational-awareness applications. Image courtesy Curtiss-Wright Defense Solutions.



The combination of high-speed modern network interfaces and
heterogeneous architectures has helped make it possible to solve compute-intensive
signal processing applications such as EO/IR, radar, or various phased signal
architectures using COTS building blocks. The debate now moves beyond
Infiniband versus Ethernet or whether to use four 10 Gigabyte data pipes or one
40 GB pipe: When analyzed properly, signal processing applications are simply a
matter of moving bits around a system. Today, using COTS, it’s possible to
accommodate even very high-end cryogenically cooled A/D modules that support
output data streams with sampling rates of many tens of Gigabits per second per
quantized bit. With a parallel architecture, 8- or even 16-bit wide A/D data
can be extracted, decimated, and sent on for additional processing by another

By using COTS building blocks to build these modern
low-latency heterogeneous signal processing architectures, system integrators
are better able to focus their resources on the harder, higher-level software
problems at which they excel. As the amount of signal processing data continues
to grow, the challenge for system architects becomes less about hardware design
and more about what to do with all that data, and how. Because COTS solutions
can now be used to move the data, the system designer can better focus on what
they are going to do with that data and concentrate on solving their higher-level

Simply put, the message to signal processing system
designers is: If you’re not using modern network-based systems today, rethink
your approach because you’re focusing on the wrong problem. The real issue:
What to do with the wealth of data and heterogeneous processing technologies
now available from COTS building blocks and network interfaces.

David Jedynak is Chief Technology Officer and Technical Fellow for Curtiss-Wright Defense Solutions. David joined Curtiss-Wright in 2008 and has focused his expertise in network-centric systems, COTS solutions, and Assured Position, Navigation, and Timing. David actively drives and supports the adoption of Open Standard Architectures for the defense industry to accelerate technology deployment. Prior to joining Curtiss-Wright, David worked in both the automotive electronics and film industries on the forefront of industry-wide migrations to cutting-edge open standard digital architectures. David’s background includes electrical engineering, astronautical engineering, and project management at UCLA and he currently resides in Austin, Texas.

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