Improving RF adaptability for radio frequency system-in-packages

Story

February 12, 2025

Brian Kimball

Mercury Systems

Mixed-signal devices have seen an increase in popularity as design techniques and process technologies continue to advance. However, end users still find themselves forced to make difficult trade-offs between bandwidth, dynamic range, and power and then must be committed to their decisions for the lifetime of the device. Next-generation modular RFSiP [radio frequency system-in-package] designs will introduce a new degree of freedom to address diverse signal-processing applications.

Mixed-signal and FPGA [field-programmable gate array] technologies are the two most foundational elements to any RFSiP [radio-frequency system-in-package). Although FPGAs are renowned for their use across a wide variety of applications and situations, the application absoluteness of mixed-signal offerings is far more challenging. Mixed-signal designers, bounded within the laws of physics, are forced into making consequential compromises between bandwidth and noise. To alleviate this inherent shortcoming, a malleable mixed-signal architecture is necessary to facilitate improved adaptability for RFSiPs.

Mixed-signal devices, responsible for analog-to-digital conversion and digital-to-analog conversion (ADC/DAC), have enjoyed major advancements in recent years. Despite the rapid breakthroughs and evolution, however, mixed-signal end users are still forced into making difficult tradeoffs amongst bandwidth, dynamic range, and power. Prioritizing bandwidth to collect more data leads to escalating susceptibility to noise and decreased signal quality. Conversely, shifting concentration to improved dynamic range leads to a narrower bandwidth, thereby restricting the amount of data. Further compounding matters, low power is averse to both bandwidth and dynamic range. This back-and-forth contention is depicted in Figure 1 as a three-way duel involving bandwidth, dynamic range, and power.

[Figure 1 ǀ A diagram shows mixed-signal discord between design tradeoffs.]

The status quo for RFSiP devices

To date, the status quo for RFSiP devices has been to commit to a particular mixed-signal die and then be saddled with that decision over the course of its lifetime. That mixed-signal die selection could either: (1) excel in bandwidth at the expense of dynamic range, (2) excel in dynamic range at the expense of bandwidth, or (3) make comprises between bandwidth, dynamic range, and power. Although the FPGA fabric itself is wide-ranging and ubiquitous, the rigidity and immobility in mixed-signal die choice stymies RFSiPs from being the all-embracing, application agnostic signal processing platform they’re capable of becoming. Concordantly, mixed-signal die innovation is happening on faster timescales than its companion FPGA technologies. These speedily progressing mixed-signal entrants come in singularly unique footprints while their FPGA counterparts tender highly flexible, scalable die with ascendancy across a common footprint schema. In aggregate, these circumstances only intensify the likelihood of post-decision dissonance in mixed-signal die choice for next generation RFSiPs.

Application space design rigidity

Altering attention to the application space, many mixed-signal die offerings are deliberately contrived with aerospace and defense operations in mind. These assorted applications are out of rhythm with one another regarding bandwidth, dynamic range, power, and channel mix. Cases in point, EW [electronic warfare] denies an opponent’s use of the electromagnetic spectrum by jamming enemy communications, disrupting radar systems, and protecting friendly forces from electronic attacks. Consequentially, EW applications crave mixed-signal technologies dedicated to expansive spectral ranges, ultrawide bandwidths, and brisk response times.

Contrastingly, ISR [intelligence, surveillance, and reconnaissance] concentrates more on information gathering to gain a clearer understanding of the adversary’s capabilities. ISR missions commonly gravitate to collection of target-quality data via penetrating and persistent monitoring. Predictably then, to strike a balance between seeing as far and as wide as possible, RF ISR yearns for mixed-signal technologies equally hierarchizing dynamic range and bandwidth attributes.

Dynamic range addresses the “far” aspect by increasing the range of signal strengths that can be effectively processed, while bandwidth addresses the “wide” aspect by increasing the difference between the upper and lower frequencies in a continuous band. Increasing in divergence from EW, communications operations focus on enabling the flow of information. This information-sharing deprioritizes broad searching proficiencies for ameliorated dynamic range. Accordingly, mixed-signal technologies devoted to higher SNRs [signal-to-noise ratios] will excel here because enhanced SNR makes signals clearer and easier to interpret as opposed to signals being corrupted or obscured by noise.

Further aggravating the application-space dilemma, all three of the previously listed cases are subjugated to inordinately dissimilar SWaP [size, weight, and power] envelopes based upon the numerous potential platforms in which they’re performing. This volatility sensibly ripples its way down to the RFSiP. As a result, the ideal RFSiP needs to be capable of acclimating and responsively yielding to its habitat, even within the same application space.

The tile approach for flexible mixed-signal solutions

The way forward for mixed-signal die flexibility is to introduce modularity within the RFSiP itself. By generating this new degree of freedom for mixed-signal die selections, next-generation RFSiPs can more nimbly wield the power of adaptation to address a broader range of signal processing applications across a greater diversity of onerous platforms. The strategy for attaining intra-RFSiP modularity for mixed-signal die involves a so-called tile concept as depicted in Figure 2.

[Figure 2 ǀ A diagram maps a technique for attaining mixed-signal die flexibility for RFSiPs.]

The decisive key to modularizing an RFSiP is the calculated dissection of its smaller constituents, in this case mixed-signal tiles, into well-defined and stable interfaces. Stable interfaces can only be achieved with the proper foresight of the desired product variants over an extended product life cycle.

In a survey of the emerging mixed-signal die market over a three-year time horizon (2024 to 2027) in close coordination with best-of-breed mixed-signal providers, it was found that the mixed-signal die candidates all had strong similarities to one another. This correspondence helped assuage inclusivity pressures across an eclectic variety of ensuing mixed-signal die offerings. The amalgamated data across mixed-signal vendors helped steer Mercury Systems toward the adoption of a 19.5 mm by 23.5 mm tile architecture. Importantly, every tile forthcoming adheres to this singular, common electromechanical footprint to achieve modularity.

Creating a new RF system-in-package

These inaugural tiles leverage the same organic substrate material as the base. This is possible because the chosen bump pitches and associated high-speed serial interfaces don’t need to use any of the more exotic materials, techniques, or methodologies. This materials symmetry favorably reduces cost, risk, complexity, and timeline, while widening the aperture for capable tile vendors as well.

At the outset these tile interfaces will adhere to JESD204B/C [the Joint Electron Device Engineering Council’s current serial standard], since that’s what the market currently dictates. In the years ahead, it’s anticipated that UCIe [Universal Chiplet Interconnect Express] will transition into the serial interface of choice for SoCs [system-on-chip]. Murkiness remains, however, around the specific version of UCIe that will be more universally accepted.

There are very prominent differences between the two vying UCIe alternatives: UCIe Standard is cost-effective and flexible, while UCIe Advanced is power-efficient and adept at higher bandwidth densities. UCIe Standard packages use organic substrates with metal traces, support channel lengths up to 25 µm and have a minimum bump pitch of ~110 u (or μm, shorthand for micrometers). UCIe Advanced packages use silicon interposers or bridges, support channel lengths up to 2 µm, and have a minimum bump pitch of ~45 u. Given the physical constraints imposed by UCIe Advanced, the use of UCIe Standard will be the likely choice that sophisticated multichip packaging suppliers will pursue. This probable choice will undoubtedly result in chiplet suppliers ensuring their product offerings include wide support for UCIe Standard.

The novelty in the tile approach is the concerted effort toward achieving mixed-signal modularity. Any cloudiness surrounding comprehension of a modular RFSiP will wane over the course of this maiden program, retiring risk until opacity subsides. Once the risk wanes, it may ostensibly be prudent to consider driving intra-RFSiP modularity as an open standard. Modular RFSiPs can unlock adaptability, reusability, and ease of upgrades. All these things are welcomed, urgently required, and important for today’s modern aerospace and defense applications.

Brian Kimball is a Systems Architect within the Advanced Concepts Group of Mercury Systems. Kimball has over 25 years of experience in RF, mixed-signal, and digital processing design for defense and aerospace applications. Key domain proficiencies center on end-to-end EW, ISR, comms, and radar architectures for various platforms spanning airborne, ground, surface, subsurface, and space.

Mercury Systems https://www.mrcy.com/