Military Embedded Systems

Sometimes 6U's size beats 3U: VMETRO talks about volume efficiency, FPGAs, and defense programs


June 24, 2008

Chris A. Ciufo

General Micro Systems, Inc.

Sometimes 6U's size beats 3U: VMETRO talks about volume efficiency, FPGAs, and defense programs

At the recent Bus&Board conference, editors Chris Ciufo and Sharon Schnakenburg got a chance to spend several hours with Thomas Nygaard of VMETRO discussing boards, military trends, and the pitfalls of choosing tech that's a bit "too bleeding edge."

MIL EMBEDDED: VMETRO recently announced several Freescale MPC8641D PowerPC-based SBCs at a time when other vendors have switched either to PowerQUICC III devices or low-power P.A. Semi processors. What's your technical plan?

NYGAARD: The two processing technologies that VMETRO is focused on are the Freescale MPC8641D and the Xilinx Virtex-5 FPGA family. Because the MPC8641D has the AltiVec coprocessor, a native Serial RapidIO port, and is coming from a long-term established supplier, it is the right processor for defense contractors developing EW, ISR, and radar applications. While P.A. Semi had a number of appealing features, we never felt comfortable in betting our roadmap on a processor from a startup. Also, the fact that it lacked a Serial RapidIO port made the chip less attractive for use in the Distributed Multi-Processing machine we are about to offer.

Of course, CPU vendors are moving toward multicore chips with four or perhaps eight cores. We will also move in this direction eventually, but fortunately we don't have to make that move today. Our current plans are well served with single or multiple MPC8641D and Xilinx FPGAs. It will take time for multicore CPU technology to get sorted out, especially since the programming is much more challenging than with one traditional CPU. Look at when "fabrics" burst onto the scene - 1999? They are finally moving into the mainstream. That took seven or eight years for the technology to get sorted out.

MIL EMBEDDED: VMETRO acquired Micro Memory in 2007, presumably to gain access to that company's CoSine FPGA IP. What about reconfigurable computing - is it or will it become mainstream?

NYGAARD: Any serious vendor servicing the high-end COTS market has to support customer-programmable FPGAs in their product line. Most companies are moving from "multiprocessor-only" solutions to a combination of FPGAs and GPPs. VMETRO is coming from the other direction. We have had an FPGA-focused product line for years, and we recently added multiprocessor products that don't have any customer-programmable FPGAs.

Collectively, the defense contractors probably have one of the largest collections of HDL programmers in the world. They are very smart and very good FPGA programmers. Literally, some of these guys really are rocket scientists. But to reach the broader market - software programmers - FPGAs are going to have to be much easier to use. I think that FPGA development tools are at least a decade behind software development tools, but progress is being made all the time. And we do see FPGA-based reconfigurable computing becoming part of almost every single project. So yes, I would say it is in the process of becoming mainstream.

MIL EMBEDDED: Let's talk specifically about the military for a moment. Today (May 13, 2008) Curtiss-Wright announced an $8 million VPX win on Future Combat Systems [FCS]. What are some of the key defense programs you're most interested in and why?

NYGAARD: Obviously, FCS is a huge program that interests anyone in this market. Two other areas that are very high priority for the military are unmanned vehicles - air, ground, and sea vehicles - and Improvised Explosive Device [IED] countermeasures. We are very focused on products that are well suited to EW, ISR, and radar applications, and these are the types of applications going into unmanned vehicles and counter-IED efforts.

The general trend in the military is a move away from centralized information to distributed information - GIG, FCS, Navy OA, Network-Centric Warfare, System of Systems, and so on. As more processing is distributed closer to, and even onto the soldier, it will require more processing power that can work in very harsh environments, with less SWaP. We are interested in these programs because the suppliers have very hard problems to solve, and our technology and expertise can help them solve these problems.

MIL EMBEDDED: I've been touting "shoebox"-sized deployed systems for several years, arguing that 3U CompactPCI (and now VPX) is a better size for retrofits than is 6U. Do you agree?

NYGAARD: I believe there is a widespread misunderstanding out there that 3U is half the size of 6U. The fact is that 3U is a lot smaller than half a 6U if you look at the effective area. OK, if you only look at the front panel area, this is 50 percent smaller on 3U than 6U. But effective board area for components is only 37 percent when you take into account the area that gets blocked by the card edge/wedge locks and the connector. Finally, the relatively small space on a 3U board makes it very hard to place multiple large chips and FPGAs, CPUs, and switches.

In practice, all of this means that it takes roughly three 3U cards to mimic the functionality of a single 6U. In different words, an example system that can be built with three 6U cards will take nine 3U cards to give the same functionality. And this occupies 50 percent more volume on the system level (see Figure 1). Still, one may find that the 3U system has smaller CPU memories, and so on. But this is not to say that 3U does not have a role. For very small systems (six boards or fewer), 3U offers a good alternative that allows very rugged designs to be made.

Figure 1

(Click graphic to zoom by 2.0x)



MIL EMBEDDED: VMETRO and others spearheaded the recent VITA 57 FMC specification. What is this, and why is it better than just basecard I/O-to-FPGA mounting?

NYGAARD: VITA 57 FMCs (FPGA I/O mezzanine cards) are great because they offer modularity for the physical I/O structure of an FPGA. Without a modular scheme, one would often be forced to do a respin of the FPGA baseboard when an I/O requirement changes. By putting the I/O connectors and I/O circuitry (such as an ADC) on a mezzanine card that can directly connect through the FMC connectors to the I/O pins of an FPGA on a baseboard, the same FPGA baseboard can be reused to interface to different I/O devices by populating an appropriate FMC module. Because the FMC interface to the baseboard is so simple, FMC modules can be developed quickly. One no longer needs to implement complex PCI or PCI Express protocol logic on mezzanine cards as is the case for PMC or XMC.

MIL EMBEDDED: What are the top three embedded technologies you're seeing in the market today … or wish you would see?

NYGAARD: 1) High-speed serial interconnects; 2) technologies paired with the new standards such as VXS and VPX; and 3) user-programmable FPGAs.

These three technologies are all gaining a lot of traction, particularly when used in concert. VPX is probably the biggest new thing in packaging since VME was invented 27 years ago, since it offers so much more I/O and also a 3U version. But one should not discount VXS as just an intermezzo; it is getting a lot of interest too, primarily in systems of medium complexity. The main advantage of VXS is that it offers backwards compatibility with VME. This is in contrast to VPX, where almost each project will call for a custom backplane with limited vendor interoperability.

Thomas Nygaard (M.Sc., EEE) is a cofounder and CTO of VMETRO. In 1982, he designed the industry's first VMEbus analyzer as a thesis work for his diploma at the Norwegian Institute of Technology. He also worked for Norsk Data, later to become Dolphin Server Technology, as a scientist and chief engineer for hardware design and architecture of mini-computers and RISC UNIX servers. At VMETRO, Thomas leads the company's product strategy planning and roadmap activities. He can be reached at [email protected].



Radar/EW - Signal Processing
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