Video surveillance chipset does reality TV in HDProduct
May 24, 2011
So your iPhone 4 records in HD at 720p. So does the Cisco Flip camera (which, by the way, just went obsolete as we went to press).
So your iPhone 4 records in HD at 720p. So does the Cisco Flip camera (which, by the way, just went “obsolete” as we went to press). How hard can HD be? Suppose you want to integrate 1080p at 60 frames/s in a military camera or remote sensing surveillance application? Are you going to duct tape an iPhone to a Global Hawk? Altera and their buddies have a better idea: the HD WDR video surveillance chipset. This ASSP comprises an Altera Cyclone IV E FPGA loaded with image processing IP bolted to an image sensor, and it provides High Def Wide Dynamic Range plus logic security. Best of all is that Altera has done all the hard work for you, and the off-the-shelf combination comes complete with tools and software, too.
Starting with an AltaSens 1080p60 A3372E3-4T image sensor, 2200 x 1125 pixels by 16 bits/pixel is fed into the FPGA at 60 frames per second. Do the math and that’s over 2 Gbps fire-hosed into the Cycle IV E FPGA. Now you see why an iPhone ain’t gonna cut it, despite the glamour of the shabby-chic duct tape look. Inside the FPGA is Apical’s HD WDR full Image Signal Processing (ISP) pipeline IP, which Altera has conveniently made available for license on their website. Other tools available for this package deal include evaluation IP prior to purchase, evaluation license, ISP core license, and Altera’s Quartus II software. It goes without saying that once the video is inside the FPGA, other processing is possible such as image enhancement, edge detection, target identification, and transcoding. We are hugely impressed with the possibilities of this rugged, programmable, COTS chipset.