Can SOSA bring back interoperability?Story
November 20, 2023
The new SOSA [Sensor Open Systems Architecture] Technical Standard – aimed at creating a common framework for transitioning military electronics sensor systems to an open systems architecture – is positioned to bring back interoperability by keeping the OpenVPX high-performance architecture while replacing the myriad of design options with a limited set of industry-agreed choices.
Military C4ISR [command, control, communications, computers, intelligence, surveillance, and reconnaissance] programs moving to the newest computing technologies face “forklift upgrades” or major overhauls because interoperability is long gone. Back in the days of VME, systems were built using components from many vendors; the standard enforced a plug-and-play commonality in designs. Today’s OpenVPX standard supports orders of magnitude increases in performance, but its wide-open flexibility means every system design is unique, driving up life cycle costs and stretching out upgrade timeframes.
Longstanding issues continue to plague DoD programs
Most defense electronics programs struggle with long technology upgrade cycles that involve replacing complete systems, which could include a new chassis populated with updated computing modules and supported by more recent power and communications cabling. These complex upgrades take years to design and implement, driving up program life cycle costs. Long upgrade timeframes also mean that deployed processors, analog-to-digital (A/D) converters, and memory chips fall behind state-of-the-art commercial components, often by several generations.
The underlying cause is a lack of technology interoperability. Customizations in hardware and unique supporting software make upgrading individual modules or specific components impossible. Interoperability, a stated goal in many programs, has rarely been achieved in any practical sense, at least not recently.
Interoperability and a look back at VME
In any technology, consistent component interoperability is based on adherence to a rigorous design standard. Embedded electronics once had such a standard – VME. For 25 years, the VME architecture defined commercial off-the-shelf (COTS) systems, while VME bandwidth increased from 40 Mbytes/sec on the original VMEbus to 80 Mbytes/sec, then 160 Mbytes/sec and finally 320 Mbytes/sec on 2eSST. These bandwidths seem small to us today, but they were able to keep up with the contemporary processing components.
A great strength of the VME ecosystem was true interoperability, supporting systems that combined components from many contributors into effective solutions. This was possible because VME was a mature and unambiguous standard. But eventually, after an incredibly long run, the VME connector eventually ran out of gas. (Figure 1.)
[Figure 1 ǀ Slot count was the only variable in 6U VME backplanes.]
OpenVPX: Fast and (too) flexible
VME’s successor was VPX, a standard created to deliver very high bandwidth communications using a new high-speed connector concept. VPX, which morphed into OpenVPX, also uses the concepts of pipes, planes, and profiles to define an architecture capable of supporting multiple data transfer protocols, including Ethernet (in all its flavors), Serial RapidIO, and PCIe.
While clearly able to meet the data movement demands of today’s most advanced C4ISR programs, OpenVPX is also very much ‘open’, so wide-open that interoperability is not a real possibility. There are literally dozens of profile options, further complicated by many user-defined connector pins. (Figure 3.)
[Figure 2 ǀ OpenVPX has dozens of slot profile options.]
“We’ve designed and manufactured several hundred OpenVPX backplanes.” said my colleague and Atrenne Director of Engineering Keith Vieira. “No two of them are the same; the level of flexibility allowed by the standard still surprises me. Moving a board from one backplane to another is pretty much impossible without significant redesign.”
Design costs go up when every program uses a unique, essentially custom backplane, upgrade cycles are stretched out, and component reuse can’t happen.
SOSA’s goal: Bring back interoperability
The Sensor Open Systems Architecture (SOSA) Technical Standard is a comprehensive standard addressing long upgrade timeframes and life cycle cost issues. Driven by the U.S. Department of Defense (DoD) with industry support, SOSA’s goals are to:
- Enable upgrades of system elements without redesigns
- Drive more competitive, cost-effective acquisitions
- Lower system life cycle costs
- Encourage commonality and reuse of components
- Enable interoperability between systems
SOSA is leveraging other, already-existing standards efforts: Starting at a high level, it is aligned with the DoD’s modular open systems approach (MOSA), focusing on using standardized hardware and software. SOSA also brings together elements from standards developed by each of the three military services, specifically the Army’s CMOSS (C4ISR Modular Open Suite of Standards), the Navy’s HOST (Hardware Open Systems Technology), and the Air Force’s SOA (Service Oriented Architecture) and UCI (Universal Command and Control Interface). The SOSA standard includes both business architecture and technical architecture; our focus here is on the technical side.
At a technical level, the SOSA standard adopted concepts and definitions from the OpenVPX standard, including a taxonomy of planes, pipes, and profiles. However, SOSA accepted only a small subset of the OpenVPX profile options. OpenVPX has quite a few plug-in card profiles (PICPs) that are, in many cases, largely redundant. To simplify that situation, SOSA employs the concept of a pinout “overlay” to define the functionality of previously undefined pins.
SOSA also reduces the number of protocol implementations defined within OpenVPX. However, the new standard does expand on the OpenVPX “Alternate Profile Module Scheme” with specific fields for RF pinouts, XMC overlay, and switch front panel fiber I/O.
The result is that SOSA systems will look like OpenVPX systems, but with a huge reduction in variability. A much more tightly defined technical specification means that cards will be interoperable between systems, and backplanes will be pin-compatible with a wide range of cards from a whole ecosystem of vendors. (Figure 3.)
[Figure 3 ǀ True interoperability will allow tech reuse and faster upgrades. 6U SBC photo courtesy Abaco/Ametek]
Moving forward with SOSA
Today’s troops face a global adversary that is technically agile and future-focused. If DoD programs cannot respond competitively, warfighters will lose the powerful technology advantage they now wield. Key to maintaining that advantage is the ability to rapidly insert new, more powerful technology into deployed sensor-enabled systems for radar, EO/IR [electro-optic/infrared], SIGINT [signals intelligence], EW [electronic warfare], and communications.
Jim Tierney is Vice President of Aerospace and Defense Systems at Atrenne Computing Solutions. He has been with the company for nearly 15 years.
Atrenne Computing Solutions https://www.atrenne.com/