Military Embedded Systems

SOSA benefits reach beyond sensor systems


November 20, 2019

The Sensor Open Systems Architecture (SOSA) is a standard currently in development by a government/industry consortium ( that has as its goal making high-performance sensor platforms easier to design, more interoperable, and upgradable at the modular level throughout a platform’s life. The rules and recommendations captured in the standard address the full range of issues faced by sensor computing system integrators including hardware, electromechanical, architecture, systems management, chassis-level connectivity, communications, middleware and development tools, and software components. Even though the standard is still under development, it is already having a substantial impact on the development of new sensor systems.

The Sensor Open Systems Architecture (SOSA) standard – currently in development by a government/industry consortium – also has the real potential to influence VPX systems beyond the sensor community. An example of this is the slot and module profiles, along with the associated rules and recommendations which can be leveraged by any VPX system designer to make systems easier to design and maintain over the system life cycle. The hardware aspects of the SOSA standard benefits both system integrators and product developers across the spectrum of VPX systems.

The OpenVPX standard (VITA 65) has been a cornerstone of the VPX community for more than 10 years. It defines and standardizes a great many aspects of VPX system design, creating vital guidelines to component suppliers and system integrators. A key component of that standard is its set of slot and module profiles. However, the latest version of VITA 65 (in ANSI balloting at the time of writing) has 29 6U and 63 3U slot profiles, each with multiple module profiles defined. In addition, nearly every slot profile other than the new SOSA-aligned profiles has user-defined pins, giving board developers the means to create custom backplane configurations. The plethora of profiles, together with these user-defined pins, makes it all but impossible to avoid designing systems to match specific hardware components from specific vendors; this reality, in turn, complicates the system design process and severely limits the ability to perform technology insertions throughout the system life.

The SOSA standard builds on VITA 65, relying heavily on the concept of slot and module profiles. However, it limits the set of approved profiles and eliminates user-defined pins in order to minimize variability in backplane connectivity and to maximize component interoperability and communications commonality. This more minimalist set of profiles has been carefully defined and vetted against nearly every conceivable type of board for sensor systems, including different types of single-board computers (SBCs), specialty processors such as graphics processor units (GPUs) and FPGAs, high-performance receivers and other I/O, storage, and networking switches. The result is a subset of 3U and 6U slot and module profiles, roughly divided into more common “primary” profiles and somewhat more specialized – but very similar – “secondary” profiles. (Figure 1.)

Figure 1 | The three SOSA-approved 3U payload profiles, SLT3-PAY-1F1U1S1S1U1U2F1H-14.6.11-n, SLT3-PAY-1F1U1S1S1U1U4F1J-14.6.13-n, and SLT3-PAY-1F1F2U1TU1T1U1T-14.2.16. With these three profiles, one can implement most any sort of computing or I/O module including single-board computers, high-performance computing modules, high-performance receivers, or other specialized I/O or bulk storage devices.



First order of business: Interoperability

Complementing these profiles is a set of rules, recommendations, and observations to guide component developers and system integrators and ensure that components will operate in a consistent manner and interoperate when connected into a system. These rules include connectivity and behaviors of utility signals such as SYS_CON, REF_CLK/AUX_CLK, NVMRO, and serial maintenance ports for console-level access to computing hardware.

One important set of rules involves power supplies; one particularly important rule limits plug-in cards to using only VS1 (12 V), 3.3 V AUX, and VBAT for primary power. The effect of this rule is profound in that it makes the design of the chassis power system much easier than when VS2 (3.3 V) and/or VS3 (5 V) are used in addition to VS1. System integrators no longer have to balance these primary power rails to the needs of the specific cards that are in the system, which eliminates the need for custom power solutions and greatly eases power problems related to future technology insertions.

Another important set of rules involves the maintenance ports. Maintenance ports are serial console ports intended strictly for system maintenance use, as opposed to an operational RS-232 link for communications between system components. In their specialized role, the maintenance ports use RS-232 protocols but can be configured for either TIA-232 (-15 V to 15 V) or LVCMOS-level (0 V to 3.3 V) signaling. The upshot: Maintenance ports can be configured to either communicate directly with common RS-232 terminals or to a port aggregator or switch using an FPGA. These rules help ensure that board maintenance ports are always in the same place and use a consistent connection approach, regardless of vendor.

SOSA in a wider sense, not just sensors

There are numerous ways that the SOSA standard will benefit the whole VPX community and not just sensor platform applications. The first, and probably most obvious, is that the limited set of slot and module profiles will tend to make backplane architectures and designs much easier. Slot choices and connectivity will be driven by the slot’s function and not by the particulars of a specific piece of hardware. There is also the distinct possibility that commercial off-the-shelf (COTS) backplanes could be designed and offered to the market, which integrators could directly leverage for their deployed platform – an impractical option in today’s market.

Turning to issues of connectivity, SOSA’s limited module profile choices provide protocol consistency, which helps to ensure communications compatibility between board types, even those from different vendors. The profile choices are also flexible, which means that different protocols (like Aurora for FPGA-to-FPGA links versus PCI Express) can be used when specialized communications is called for. All of this can be attained while maintaining consistency across the rest of the backplane communications ports.

For the integrator, these benefits make performing trade studies and designing systems faster and make the resulting systems more likely to “just work” when they are integrated. Less time and effort spent on this up-front engineering effort means lower cost and more time to spend on critical application-specific engineering efforts.

For the supplier, the benefits are also substantial. Easier and faster customer trade studies and up-front design work means a quicker decision cycle and less need for pre-sales support, while easier integration leads to reduced post-sales support burdens. There’s less of a chance of needing to investigate and debug awkward interoperability issues with different, often competing vendor products. In addition, choosing from the limited set of SOSA slot and module profiles means less engineering effort spent on backplane connectivity and more effort put into new, differentiating product features.

The real beneficiary of applying the SOSA standard, however, will ultimately be the end user: Whether it is the war­fighter relying on an advanced sensor system to help them carry out their mission, or a commercial application relying on the rugged high-performance features of VPX, SOSA-enabled technologies mean quicker time to deployment and easier, faster, and cheaper technology refresh projects, which translate to lower system life cycle costs and better tracking of technological innovation over the life of the deployed system.

SOSA-aligned products available

SOSA is not an over-the-horizon possibility. While the standard is still a work in progress, enough of the standard has finalized to allow hardware module and backplane suppliers and some system integrators to offer products “designed in alignment with” the SOSA standard (as the language of the consortium directs, as there is no certification program in place yet).

Kontron’s VX305C-40G is a 3U I/O-intensive SBC, while the VX305H-40G is a 3U compute-intensive (that is, payload profile) SBC. Both are based on Intel’s 12-core Xeon D-1559 processor and both offer 32 GB of DDR4 memory with ECC, 40 Gigabit Ethernet (40GBASE-KR4) data planes, 10 Gigabit Ethernet (10GBASE-KR) control planes, PCI Express Gen 3 expansion planes, an XMC site (with backplane mapping for the VX305C-40G), and a VITA 46.11 Intelligent Platform Management Controller (IPMC). Both are in production today and both have been integrated into SOSA-aligned systems with backplanes and other payload cards from various manufacturers. (Figure 2.)

Figure 2 | Kontron’s two SOSA-aligned SBCs, the VX305C-40G and VX305H-40G.



The SOSA standard is currently available as a “Snapshot 2” document (publicly available at and is rapidly maturing towards its 1.0 release. Many vendors have announced or are working on SOSA-aligned products in both 3U and 6U form factor, while integrators across the spectrum of sensor modalities are working on SOSA-aligned systems or are planning their SOSA adoption strategies. Given this flurry of activity, and the standard’s obvious benefits, it is likely that the SOSA standard will have a profound impact on how products are created and used by VPX systems designers for years to come.

Mark Littlefield is a vertical product manager for the defense business line for Kontron. He has more than 25 years of experience in embedded computing, where he has held a range of technical and professional roles supporting defense, medical, and commercial applications. Littlefield holds bachelor’s and master’s degrees in control systems engineering from the University of West Florida, where he wrote his thesis on a neural net application for image processing. Readers may reach the author at [email protected]



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