General Micro Systems, Inc.
P.O. Box 3689
Rancho Cucamonga, California 91730 [email protected]
AUSA 2021--WASHINGTON. Military Embedded Systems is excited to announce today the winners of our Best in Show Award contest, which which we're holding for our supporters exhibiting at the Association of the U.S. Army (AUSA) Annual Meeting, held last week, Oct. 11-13 in Washington, D.C. Contest winners -- drawn from military embedded systems exhibitors at the event -- are recognized for the improved performance and innovation they bring to military electronic systems applications such as radar, electronic warfare, and avionics as well as for rugged computing, interconnect technology, artificial intelligence (AI), and embedded computing.
AUSA ANNUAL MEETING & EXPOSITION -- WASHINGTON, D.C. General Micro Systems (GMS) announced that it has joined The Open Group's Future Airborne Capability Environment (FACE) and Sensor Open Systems Architecture (SOSA) consortia.
The “X9 SPIDER” is available in two 3U OpenVPX versions, each of which offers more I/O, processing, and add-on co-processing than is found on two 6U-sized boards (VME or OpenVPX). The 2-slot X9 SPIDER VPX-HS version uses dual 1-inch pitch slots for I/O, power and conduction cooling, and has over 455 Gbps of external bandwidth across 13 ports. The 1-slot (1-inch pitch) conduction-cooled X9 SPIDER VPX-S offers 11 ports and 255 Gbps of I/O bandwidth. Each version represents a complete computer system, replacing two or more 6U modules. This is unheard of for 3U OpenVPX, which is complimented for its small size but then criticized for the lack of user I/O to the backplane. GMS has solved this 3U OpenVPX I/O problem, freeing users to take advantage of 3U’s size, weight and power (SWaP) advantages without the limitations of P1/P2 I/O. Of course, both X9 SPIDER products use VITA 65 profiles, and were developed in alignment with the SOSA™ Technical Standard.